Chip Level Sta Asic Engineer (Armenia)
Chip Level Sta Asic Engineer (Armenia)
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Armenia, Colombia
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Publicado: hace menos de una semana
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Guardar
Descripción
Meet the Team Join Cisco’s ASIC Physical Design Team, where we ensure the highest quality in full-chip timing closure and circuit performance to guarantee a successful tape-out. We bridge the gap between design and reality by collaborating across block implementation, flow, SDC, EMIR, and IP/tool vendor teams to drive silicon excellence. As a tight-knit group of highly skilled engineers, we foster a collaborative environment where innovation meets precision. Together, we are building the foundation for the future of connectivity, driving advancements in power, performance, and reliability with every project. This is your opportunity to shape the technology that connects the world while working alongside a team that values mentorship and celebrates technical success. Your Impact Drive Cisco’s silicon innovation by leading full-chip partitioning and implementation from initial floorplan to final tape-out to ensure high-quality silicon delivery. Execute complex chip-level planning, including clock structures and feedthrough management, to optimize power, performance, and area (PPA) metrics. Collaborate with cross-functional teams, including package, power integrity, and RTL design, to resolve integration challenges and ensure seamless handoffs. Conduct rigorous quality checks and sign-off procedures to guarantee design integrity before the silicon is sent to manufacturing. Foster a culture of technical excellence and mentorship to accelerate design processes and empower integral connectivity. Minimum qualifications
- Bachelor's or Master's degree in Electrical Engineering or Computer Science.
- Minimum of 3 years of hands-on experience in ASIC design and verification.
- Proven experience working with deep submicron CMOS technologies.
- Comprehensive knowledge of the full design cycle from RTL to GDSII.
- Demonstrated hands-on experience in RTL2GDS flows, floorplanning, and power planning.
Preferred qualifications
- Proficiency in industry-standard PnR tools such as Syno Postúlate en Kit Empleo: kitempleo.com.co/empleo/1avliv
- Bachelor's or Master's degree in Electrical Engineering or Computer Science.
- Minimum of 3 years of hands-on experience in ASIC design and verification.
- Proven experience working with deep submicron CMOS technologies.
- Comprehensive knowledge of the full design cycle from RTL to GDSII.
- Demonstrated hands-on experience in RTL2GDS flows, floorplanning, and power planning.
Preferred qualifications
- Proficiency in industry-standard PnR tools such as Syno Postúlate en Kit Empleo: kitempleo.com.co/empleo/1avliv
Información clave
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Nombre de la empresaCisco Systems
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Nombre de la vacanteChip Level Sta Asic Engineer (Armenia)
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