Senior Physical Design Engineer - Signoff Methodology (Armenia)
Senior Physical Design Engineer - Signoff Methodology (Armenia)
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Armenia, Colombia
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Publicado: hace menos de una semana
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Descripción
This is a hybrid role with four days per week at Cisco’s Yerevan office. Meet the Team You’ll be joining our CAD Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This team is a critical part of the group leading the development of high-quality VLSI designs and supports the creation of advanced silicon. Our design center brings together all silicon hardware and software development fields, encouraging collaboration and technical excellence. Your Impact As part of our team, you’ll help develop and improve flows for all signoff disciplines and contribute to the evolution of implementation tool flows. You’ll play a key role in enabling the delivery of high-performance, large-scale, and complex devices that push the boundaries of what’s possible in chip design.
- Develop and refine backend methodologies and flows from RTL to GDS, supporting high-quality VLSI design.
- Contribute to the advancement of all signoff flows, including physical synthesis, place and route, power optimization, timing closure, and physical closure.
- Collaborate with engineering teams to support and enhance implementation tool flows.
- Work with advanced silicon technologies and processes to deliver complex and reliable devices. Minimum Requirements
- 5+ years of experience as a CAD Physical Design Engineer with PnR and STA or as a Design Engineer with strong backend design experience.
- B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or a related field.
- Strong understanding of STA flows.
- Familiarity with PnR, physical verification (PV), and formal verification (FV). Preferred Qualifications
- Experience in Physical Design CAD, especially with industry-standard EDA tools such as Synopsys or Cadence.
- Ability to work both independently and within a team.
- Strong self-learning skills and effective communication. #J-18808-Ljbffr Postúlate en Kit Empleo: kitempleo.com.co/empleo/1b5ck7
- Develop and refine backend methodologies and flows from RTL to GDS, supporting high-quality VLSI design.
- Contribute to the advancement of all signoff flows, including physical synthesis, place and route, power optimization, timing closure, and physical closure.
- Collaborate with engineering teams to support and enhance implementation tool flows.
- Work with advanced silicon technologies and processes to deliver complex and reliable devices. Minimum Requirements
- 5+ years of experience as a CAD Physical Design Engineer with PnR and STA or as a Design Engineer with strong backend design experience.
- B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or a related field.
- Strong understanding of STA flows.
- Familiarity with PnR, physical verification (PV), and formal verification (FV). Preferred Qualifications
- Experience in Physical Design CAD, especially with industry-standard EDA tools such as Synopsys or Cadence.
- Ability to work both independently and within a team.
- Strong self-learning skills and effective communication. #J-18808-Ljbffr Postúlate en Kit Empleo: kitempleo.com.co/empleo/1b5ck7
Información clave
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Nombre de la empresaCisco Systems
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Nombre de la vacanteSenior Physical Design Engineer - Signoff Methodology (Armenia)
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